diff --git a/ohmpi/hardware_components/abstract_hardware_components.py b/ohmpi/hardware_components/abstract_hardware_components.py
index 83746c6c364149f4f1c2e10cdddfa108a80f598e..629cd53a41211cb4491cc3de21e92b20b41c7599 100644
--- a/ohmpi/hardware_components/abstract_hardware_components.py
+++ b/ohmpi/hardware_components/abstract_hardware_components.py
@@ -55,6 +55,7 @@ class PwrAbstract(ABC):
         self._current_max = kwargs.pop('current_max', 0.)
         self._voltage_min = kwargs.pop('voltage_min', 0.)
         self._voltage_max = kwargs.pop('voltage_max', 0.)
+        self.ctl = kwargs.pop('ctl', None)
 
     @property
     @abstractmethod
diff --git a/ohmpi/hardware_components/pwr_dps5005.py b/ohmpi/hardware_components/pwr_dps5005.py
index 0ba8bfa86bbe9914bc04669909f5687ba00bf1ce..4aa1a9f66a0153602d1513746038bd56c0383743 100644
--- a/ohmpi/hardware_components/pwr_dps5005.py
+++ b/ohmpi/hardware_components/pwr_dps5005.py
@@ -2,19 +2,30 @@ from ohmpi.hardware_components.abstract_hardware_components import PwrAbstract
 from ohmpi.config import HARDWARE_CONFIG
 import importlib
 import numpy as np
+import minimalmodbus  # noqa
 import os
 
-ctl_name = HARDWARE_CONFIG['ctl'].pop('board_name', 'raspberry_pi_modbus')
+CTL_CONFIG = HARDWARE_CONFIG['ctl']
+ctl_name = CTL_CONFIG.pop('board_name', 'raspberry_pi_modbus')
 ctl_module = importlib.import_module(f'ohmpi.hardware_components.{ctl_name}')
+CTL_CONFIG['baudrate'] = CTL_CONFIG.pop('baudrate', 9600)
+CTL_CONFIG['bitesize'] = CTL_CONFIG.pop('bitesize', 8)
+CTL_CONFIG['timeout'] = CTL_CONFIG.pop('timeout', 1)
+CTL_CONFIG['debug'] = CTL_CONFIG.pop('debug', False)
+CTL_CONFIG['parity'] = CTL_CONFIG.pop('parity', 'N')
+CTL_CONFIG['mode'] = CTL_CONFIG.pop('mode', minimalmodbus.MODE_RTU)
+CTL_CONFIG['port'] = CTL_CONFIG.pop('port', '/dev/ttyUSB0')
+CTL_CONFIG['slave_address'] = CTL_CONFIG.pop('slave_address', 1)
+
 
 class Pwr(PwrAbstract):
     def __init__(self, **kwargs):
         kwargs.update({'board_name': os.path.basename(__file__).rstrip('.py')})
         voltage = kwargs.pop('voltage', 12.)
         super().__init__(**kwargs)
+        # if a controller is passed in kwargs, it will be instantiated
         if self.ctl is None:
-            self.ctl = ctl_module.Ctl()
-        self.ctl.bus.configure_modbus()
+            self.ctl = ctl_module.Ctl(**CTL_CONFIG)
         self.voltage_adjustable = True
         self._voltage = voltage
         self._current_adjustable = False
diff --git a/ohmpi/hardware_components/raspberry_pi_modbus.py b/ohmpi/hardware_components/raspberry_pi_modbus.py
index 7bfc0ddd561d525f17797e8399b28f5381a3f6fb..4c5405441890dabe1cf70e6d686f62cb4582b481 100644
--- a/ohmpi/hardware_components/raspberry_pi_modbus.py
+++ b/ohmpi/hardware_components/raspberry_pi_modbus.py
@@ -1,4 +1,5 @@
 from ohmpi.hardware_components import CtlAbstract
+from ohmpi.config import HARDWARE_CONFIG
 import board  # noqa
 import busio  # noqa
 import os
@@ -7,12 +8,28 @@ from gpiozero import CPUTemperature  # noqa
 import minimalmodbus  # noqa
 
 
+
 class Ctl(CtlAbstract):
     def __init__(self, **kwargs):
         kwargs.update({'board_name': os.path.basename(__file__).rstrip('.py')})
+        baudrate = kwargs.pop('baudrate', 9600)
+        bitesize = kwargs.pop('bitesize', 8)
+        timeout = kwargs.pop('timeout', 1)
+        debug = kwargs.pop('debug', False)
+        parity = kwargs.pop('parity', 'N')
+        mode = kwargs.pop('mode', minimalmodbus.MODE_RTU)
+        port = kwargs.pop('port', '/dev/ttyUSB0')
+        slave_address = kwargs.pop('slave_address', 1)
+        port = kwargs.pop('port', '/dev/ttyUSB0')
+        slave_address = kwargs.pop('slave_address', 1)
         super().__init__(**kwargs)
-        self.bus = minimalmodbus.Instrument(port='/dev/ttyUSB0', slaveaddress=1)  # port name, address (decimal)
-        self.configure_modbus() # TODO: check if this works on init
+        self.bus = minimalmodbus.Instrument(port=port, slaveaddress=slave_address)  # port name, address (decimal)
+        self.bus.serial.baudrate = baudrate  # Baud rate 9600 as listed in doc
+        self.bus.serial.bytesize = bitesize  #
+        self.bus.serial.timeout = timeout  # greater than 0.5 for it to work
+        self.bus.debug = debug  #
+        self.bus.serial.parity = parity  # No parity
+        self.bus.mode = mode  # RTU mode
         platform, on_pi = get_platform()
         assert on_pi
         self.board_name = platform
@@ -22,12 +39,3 @@ class Ctl(CtlAbstract):
     @property
     def _cpu_temp(self):
         return CPUTemperature().temperature
-
-    def configure_modbus(self, baudrate=9600, bitesize=8, timeout=1, debug=False, parity='N',
-                         mode=minimalmodbus.MODE_RTU):
-        self.bus.serial.baudrate = baudrate  # Baud rate 9600 as listed in doc
-        self.bus.serial.bytesize = bitesize  #
-        self.bus.serial.timeout = timeout  # greater than 0.5 for it to work
-        self.bus.debug = debug  #
-        self.bus.serial.parity = parity  # No parity
-        self.bus.mode = mode # RTU mode
\ No newline at end of file
diff --git a/ohmpi/hardware_system.py b/ohmpi/hardware_system.py
index 9c3db9d82a9fed8483904a19db934986f789a60a..e61738b962e05015e1596592500749828c3a0e52 100644
--- a/ohmpi/hardware_system.py
+++ b/ohmpi/hardware_system.py
@@ -77,8 +77,13 @@ class OhmPiHardware:
                                        'soh_logger': self.soh_logger})
         self.rx = kwargs.pop('rx', rx_module.Rx(**HARDWARE_CONFIG['rx']))
         HARDWARE_CONFIG['pwr'].pop('model')
-        HARDWARE_CONFIG['pwr'].update(**HARDWARE_CONFIG['pwr'])
-        HARDWARE_CONFIG['pwr'].update({'ctl': self.ctl})
+        HARDWARE_CONFIG['pwr'].update(**HARDWARE_CONFIG['pwr'])  # NOTE: Explain why this is needed or delete me
+        HARDWARE_CONFIG['pwr'].update({'ctl': HARDWARE_CONFIG['pwr'].pop('ctl', self.ctl)})
+        if isinstance(HARDWARE_CONFIG['pwr']['ctl'], dict):
+            ctl_mod = HARDWARE_CONFIG['pwr']['ctl'].pop('model', self.ctl)
+            if isinstance(ctl_mod, str):
+                ctl_mod = importlib.import_module(f'ohmpi.hardware_components.{ctl_mod}')
+            HARDWARE_CONFIG['pwr']['ctl'] = ctl_mod.Ctl(**HARDWARE_CONFIG['pwr']['ctl'])
         HARDWARE_CONFIG['pwr'].update({'exec_logger': self.exec_logger, 'data_logger': self.data_logger,
                                       'soh_logger': self.soh_logger})
         self.pwr = kwargs.pop('pwr', pwr_module.Pwr(**HARDWARE_CONFIG['pwr']))